This disclosure relates to semiconductor devices, methods of manufacture thereof and to articles comprising the same.
Metal-Oxide-Semiconductor field effect transistor (MOSFET) technology is the dominant electronic device technology in use today. Performance enhancement and cost reduction between generations of integrated circuits (ICs) is generally achieved by reducing the size of transistors in the ICs, resulting in an enhancement in transistor speed and increasing integrated transistor area density. This is generally referred to as transistor “scaling”.
Ultra-large-scale integrated (ULSI) circuits generally include a multitude of transistors, such as more than one million transistors and even several billion transistors that cooperate to perform various functions for an electronic component. The transistors are generally complementary metal oxide semiconductor field effect transistors (CMOSFETs) that include a gate conductor disposed between a source region and a drain region. The gate conductor is provided over a thin gate oxide material or high-k material. Generally, the gate conductor can be a metal, a polysilicon, or polysilicon/germanium (SixGe(1-x)) material that controls charge carriers in a channel region between the drain and the source to turn the transistor on and off. The transistors can be N-channel MOSFETs or P-channel MOSFETs.
In semiconductor-on-insulator (SOI) semiconductor-type devices, transistors such as MOSFETs, are built on the top surface of a SOI substrate. The substrate is doped to form source and drain regions, and a conductive layer is provided between the source and drain regions. The conductive layer operates as a gate for the transistor; the gate controls current in a channel between the source and the drain regions. As transistors become smaller, the SOI thickness of the transistor is scaled down to achieve superior short-channel performance.
As MOSFETs are scaled to channel lengths below 100 nanometers (nm), conventional MOSFETs suffer from several problems. In particular, interactions between the source and drain of the MOSFET degrade the ability of the gate to control whether the device is on or off This phenomenon is called the “short-channel effect” or SCE.
It is therefore desirable to design MOSFETs having channel lengths of less than 100 nanometers that do not display the degradation and provide desired threshold voltage operation. Metal gates are currently used in sub-35nm device along with high-k dielectric gate insulators.